This disclosure concerns techniques and circuits for detecting IR voltage drop conditions at one or more circuit test points during operation of an integrated circuit, using comparator circuits carried on the integrated circuit to generate signals that represent the amplitude of an IR voltage drop at one or more monitored test points compared to reference voltage(s). The comparator circuits can discriminate for pulses based on pulse width, and store the state of one or more comparators at predetermined times in a testing cycle. In this way, occurrences of IR voltage drops can be associated with dynamic circuit operations.
A conductor that connects between two points in a circuit has an electrical resistance R determined by the conductor material and dimensions. The conductor carries a current I proportional to the difference V in voltage between such points, according to Ohm's Law: V=IR. When an electrical load in a circuit is supplied with current from a supply voltage through a conductor, the voltage at the load is equal to the supply voltage level less a voltage drop equal to the product of the resistance of the conductor times the current passing through the conductor. Depending on the operational state of the circuit, loads may draw a variable amount of current at any given time. The operational state of the circuit varies with the conductive state of switching elements and with the input stimulus and output voltages and currents, whether reactive elements are charging or discharging, etc.
Circuit loads are coupled across a potential difference by two conductors, i.e., between different voltages. An IR voltage drop occurs along a conductor carrying current from a VDD supply voltage (or other reference) to the more positive terminal of the load, leading to a reduced or drooping supply voltage at that terminal. Another IR drop occurs along a conductor from the more negative other terminal of the load to a ground potential (or other reference), leading to an elevated supply voltage at such other terminal, sometimes called ground bounce. The resistances of the load and the two conductors coupling the load to the supply voltages form a voltage divider. When the load is carrying current, the IR voltage drops along the two supply conductors reduce the potential difference that is applied across the load, compared to the case where no current or less current in being conducted. The load might require a minimum potential difference for acceptable performance.
Positive and ground (or negative) supply voltages are coupled to integrated circuits via power supply inputs at the chip level or at the chip package level, and within the chip or package, various load devices are supplied by conductive connections between the power supply inputs and the loads. The internal power supply conductors, sometimes termed power supply rails, may trace paths across the area of the chip in a grid of conductors, as well as up and down through connecting vias between superimposed semiconductor layers. Individual conductors may comprise narrow strips of thinly deposited metal alloys, polycrystalline silicon or other materials. Although the integrated circuit package as a whole is a load on the power supply, the operational devices within the integrated circuit likewise are internal loads. Power supply conductors as well as signal conductors are subject to IR voltage drops along conductors within the integrated circuit package or chip.
IR voltage drop considerations are important during integrated circuit design and planning stages. Alternative circuit layouts can be considered in view of the expected IR voltage drop conditions and the requirements of the load devices. IR drops are calculated based on the resistivity of the conductor material, the cross sectional dimensions of the conductor, the length of the conductor between defined points, typical operational states of the circuit such as the number of switching elements toggling simultaneously, and the expected current loading. If it appears that a load device may be adversely affected by IR voltage drop conditions, the load device may be moved to a location closer to a more regulated source along the power supply rails, i.e., to reduce conductor length, or the conductors can be made wider or thicker, in either case reducing their resistance.
Accounting for the IR drops associated with loads can be a complicated matter due, for example, to the complexity and variable shapes of conductive paths. Some programmed layout planning systems have a function for estimating IR voltage drop, but it is also advantageous to provide a way to test practical circuits to determine whether assumptions made during layout planning can be proved on regularly manufactured chips. For early manufacturing process development, testing also helps to adjust and fine-tune models and technology files. A designer might choose to provide power rail conductors that are more than sufficient in number and size, but this uses scarce circuit area. It is desirable to scale down all elements including conductors, to as small a size as needed to support the load devices. At the same time, it is desirable to allow some leeway to accommodate for process variations.
The current drawn by circuit loads can vary from time to time due to the operational state of the circuit. For example, circuits may have reactive aspects (capacitance and inductance) and switching and amplifying circuit devices (e.g., transistors, diodes) that dynamically affect the currents flowing through loads and along conductors. If a load that is closer to the regulated voltage source begins or increases the draw of current, the associated IR voltage drop reduces the supply voltage at that load and at other loads that are farther away from the regulated voltage source along a power supply rail or similar conductor.
Differences in operational states of switched and high frequency circuits cause current loading conditions to vary over short time periods. In the example of a static random access memory chip, for example an SRAM array with bit cells comprising cross coupled inverters, the inverter inputs and outputs are allowed to float until the particular bit cell is addressed, whereupon load currents are produced in the circuit depending on which word lines and bit lines are active, the logic state of the bit cells, and the location of the bit cells on the chip. Operations like this can produce a brief but considerable IR drop across the conductors in the chip, including but not limited to the power supply rails.
Modeling can be used to predict voltage drops under various assumed current and operational conditions. However, an effective and efficient technique for actually measuring voltage drop conditions would be useful for verifying a circuit design, i.e., to confirm that IR voltage drops measured when a nominal integrated circuit design is actually manufactured and operated, are such that sufficient supply voltages are available when needed by the various load devices. In this way, testing verifies the dependability of circuits under worst case operational conditions and accounting for normal manufacturing process variations.
To prove a design, prototypes of integrated circuit chips might be tested more or less extensively. After a production run, a statistical sampling of manufactured chips can be tested. It is possible to test every one of the chips or chip packages produced in a manufacturing run, using automated test equipment. “Automatic Test Equipment” in this context, sometimes abbreviated “ATE” refers to stand alone test apparatus that is used to test manufactured chips, on the wafer or after packaging of the chips. The Automatic Test Equipment may be coupled to inputs and outputs of the chip or package, or may be coupled to defined points on the chip circuits by contacts. The Automatic Test Equipment applies a stimulus to exercise some or all of the circuits on a chip or package under test, and determines whether or not such circuits respond appropriately. The Automatic Test Equipment may be configured to execute combinations of predetermined input signals as stimuli that are expected to produce predetermined output signals or functions, and to advance in sequence to other predetermined combinations. Automatic Test Equipment can be arranged to make contact with surface-accessible conductors within the circuit under test, as opposed to externally accessible inputs and outputs, in more or less complicated and intrusive regimens of exercising and testing the circuit.
Automatic Test Equipment might be capable of testing voltage conditions at points of contact with an integrated circuit or package. It is not readily possible with a stand-alone external Automatic Test Equipment apparatus to sense voltage and current conditions at various points within an integrated circuit, including points that are potentially deep within an array of elements on the chip and not directly accessible through signal lines available off the chip or even on a readily accessible surface. The number and locations of test points accessed using Automatic Test Equipment are limited for practical reasons.
A technique is needed that may provide useful and potentially extensive test information wherein on-chip circuits provide test information derived from various circuit points that might not be accessible to an external Automatic Test Equipment apparatus. Advantageously, the technique should complement the capabilities of the Automatic Test Equipment, for example by producing signals that result from diagnostic testing and are fed to the Automatic Test Equipment as opposed to coupling signals directly from the circuit conductors to the Automatic Test Equipment for testing voltage, current, timing or other parameters.
Test techniques are needed that are optimal for prototype testing, when proving and finalizing design choices, as a quality assurance testing technique associated with production, and as an ongoing operational measurement, for operational assurance or for varying operations, for example in circuits that use variable voltage regulation devices to limit power consumption. It is useful for such devices and techniques to be capable of discerning short term IR drop conditions such as infrequent spikes associated with specific circuit conditions, and preferably to distinguish between shorter and longer term IR drops at supply voltages to particular loads, in a way that permits the IR drops to be associated with operational states of the load devices.